Method for manufacturing a semiconductor device having a ferroelectric capacitor

ABSTRACT

In a semiconductor device having a ferroelectric capacitor and manufacturing method thereof, a spacer comprising a low dielectric constant material is formed on the side surfaces of a plurality of lower electrodes separated into each cell unit, and a ferroelectric film is formed on the lower electrodes whereon the low dielectric constant material spacer is formed, and an upper electrode is formed on the ferroelectric film, to thereby prevent an error which may be caused between the adjacent lower electrodes.

This is a continuation of application Ser. No. 08/507,948, filed on Jul.27, 1995, which was abandoned upon the filing hereof which in turn is adivisional application of application Ser. No. 08/187,037, filed Jan.27, 1994, abandoned.

BACKGROUND OF THE INVENTION

The present invention relates to a semiconductor device and a method formanufacturing the same, and more particularly, to a semiconductor deviceand a method for manufacturing the same which uses a ferroelectric filmas the dielectric film of a capacitor.

The integration of dynamic random access memory (DRAM) devices has beenincreasing in recent years, and many methods for increasing capacitancewithin a limited cell area have been proposed. These methods can belargely divided into two groups: one in which the physical structuralcharacteristics of the capacitor is improved, and another in which thecapacitor comprises a material having a high dielectric constant.

Where the capacitor structure has been improved, the effective area ofthe capacitor has been increased by forming a three-dimensional storageelectrode. Here, however, design rule limitations and complicatedmanufacturing processes impede the increase of capacitance.

On the other hand, where a material having a high dielectric constant isused as the dielectric film of the capacitor, capacitance is not limitedby design rule and can be increased more easily.

Recently, it has been proposed to use a ferroelectric material as thedielectric film. Unlike the previously existing oxide, silicon nitrideor tantalum pentoxide (Ta₂ O₅) films, a ferroelectric material is amaterial which exhibits spontaneous polarization, and generally has ahigh dielectric constant of at least 1,000. When the ferroelectricmaterial is used as the dielectric film, the thickness of an equivalentoxide film can be reduced, for example, to 10 Å or less, even though theferroelectric material is formed to a thickness of only several thousandangstroms. Furthermore, due to the spontaneous polarization phenomenon,a dielectric film comprising a ferroelectric material can be used fornonvolatile memory devices as well as for DRAMs.

In addition, PZT (PbZrTiO₃), BST (BaSrTiO₃) and the like have a highdielectric constant and ferroelectric characteristics that differaccording to their composite ratio. Therefore, these materials haverecently been popular as dielectric materials for DRAM capacitors. Whensuch materials are used for the dielectric film, platinum is used forthe electrode of the capacitor due to its great resistance to oxidation.

FIG. 1 is a sectional view of a semiconductor device having aferroelectric film capacitor manufactured by a conventional method.

In FIG. 1, a transistor pair is formed in the active region defined byfield oxide film 10 of a semiconductor substrate 100. The transistorsshare a drain region 7, and each comprise a source region 5 and a gateelectrode 15. A bit line 20 is connected to drain region 7, and contactholes for exposing predetermined portions of each source region 5 areformed thereabove.

Each contact hole is filled with a conductive plug 25 and thecapacitors' lower electrodes, each consisting of a titanium layer 30 andplatinum layer 35, are formed on each plug. A ferroelectric thin film 40is formed over the lower electrodes, and an upper electrode 50 is formedon ferroelectric thin film 40.

In a capacitor manufactured according to the conventional methoddescribed above, the film can be weakened at the sharp edges of thelower electrode (e.g., see area "B" of FIG. 1) when the ferroelectricfilm is formed after lower electrode formation. In addition, because thedielectric constant of a ferroelectric film is very large, roughly from1,000 to 10,000, there is a high possibility that errors will occurbetween the adjacent capacitors through the ferroelectric film disposedbetween the adjacent lower electrodes (see area "A" of FIG. 1).

In 1991, Kuniaki Koyama et al. disclosed a new method for manufacturinga capacitor in order to solve the problems described above (see IEDM'91, "A Stacked Capacitor with (Ba_(x) Sr_(1-x))TiO₃ for 256M DRAMs").FIGS. 2A to 2E are sectional views that illustrate a method formanufacturing this capacitor.

Referring to FIG. 2A, an insulating layer 102 is formed on semiconductorsubstrate 100, and a contact hole 105 is formed by etching apredetermined portion of insulating layer 102. Then, impurity-dopedpolysilicon is deposited over the entire resultant structure, and fillscontact hole 105. The structure is subsequently etched back in a mannerwhich allows contact hole 105 to remain filled with polysilicon 110.

Referring to FIG. 2B, a tantalum layer and a platinum layer aresequentially sputtered on the resultant structure, each to a thicknessof 500 Å. Both layers are then patterned by a dry-etching process toform a platinum pattern 125 and a tantalum pattern 120, which constitutea lower electrode.

Referring to FIG. 2C, (Ba₀.5 Sr₀.5)TiO₃ is deposited over the entireresultant structure by RF magnetron sputtering, to thereby form aferroelectric film 130 having a thickness of 700-2,000 Å.

Referring to FIG. 2D, a chemical vapor deposition (CVD) oxide filmhaving a thickness of 1,000 Å is formed over the entire resultantstructure. The structure is subsequently etched anisotropically, tothereby form a spacer 135 which reduces leakage current caused by thepoor step coverage of ferroelectric film 130.

Referring to FIG. 2E, a titanium nitride (TiN) layer 140 forms an upperelectrode having a thickness of 1,000 Å and is deposited across theentire resultant structure.

A capacitor manufactured by the above method forms a CVD oxide filmspacer whose breakdown resistance is excellent even at the weak portionsof the ferroelectric film, and thus has a very low leakage current and astable breakdown resistance distribution.

However, due to the very high dielectric constant of the ferroelectricfilm, the possibility that an error will be caused between the adjacentcapacitors still remains.

SUMMARY OF THE INVENTION

Accordingly, it is a first object of the present invention to provide areliable semiconductor device having a spacer consisting of a lowdielectric material between the adjacent capacitors. It is a secondobject of the present invention to provide a method especially suitedfor manufacturing the above described reliable semiconductor device.

To accomplish the first object of the present invention, there isprovided a semiconductor device having a capacitor with a spacer formedon the side surfaces of plural lower electrodes. The spacer comprises amaterial with a low dielectric constant. A ferroelectric film is formedon the lower electrodes, and an upper electrode is formed on theferroelectric film.

To accomplish the second object of the present invention, there isprovided a method for manufacturing a semiconductor device having acapacitor, comprising the steps of: forming a plurality of lowerelectrodes from a conductive material; forming a spacer comprising amaterial with a low dielectric constant on the side surfaces of eachlower electrode; forming a ferroelectric film over at least the spacerand lower electrodes; and forming an upper electrode on theferroelectric film.

To accomplish another object of the present invention, there is provideda method for manufacturing a semiconductor device having a capacitor,comprising the steps of: forming a plurality of lower electrodes from aconductive material; providing a material having a low dielectricconstant between the lower electrodes; forming a ferroelectric film overat least the lower electrodes and said material having a low dielectricconstant, and forming an upper electrode on the ferroelectric film.

Accordingly, a spacer having a low dielectric constant is formed betweeneach lower electrode, to thereby prevent the occurrence of errorsbetween the adjacent capacitors.

BRIEF DESCRIPTION OF THE DRAWINGS

The above objects and other advantages of the present invention willbecome more apparent in view of the following description of a preferredembodiment with reference to the attached drawings in which:

FIG. 1 is a sectional view showing a semiconductor device comprising aferroelectric film capacitor manufactured by a conventional method;

FIGS. 2A to 2E are sectional views for illustrating a ferroelectric filmcapacitor manufactured by another conventional method;

FIGS. 3 to 6 are sectional views for illustrating a method formanufacturing a semiconductor device comprising a ferroelectric filmcapacitor according to a first embodiment of the present invention;

FIGS. 7 to are sectional views for illustrating a method formanufacturing a semiconductor device comprising a ferroelectric filmcapacitor according to a second embodiment of the present invention; and

FIGS. 9 to 10 are sectional views for illustrating a method formanufacturing a semiconductor device comprising a ferroelectric filmcapacitor according to a third embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will be explained in more detail with reference tothe attached drawings.

FIGS. 3 to 6 are sectional views for illustrating a method formanufacturing a semiconductor device comprising a ferroelectric filmcapacitor according to a first embodiment of the present invention.

FIG. 3 shows the step of forming a contact hole and a conductive plug 25on a semiconductor substrate 100 whereon a transistor pair is formed.Semiconductor substrate 100 has an isolation region and an active regionas defined by field oxide film 10. A pair of transistors each have asource region 5, a gate electrode 15, and share a drain region 7 and abit line 20 connected to the drain region. The transistors are formed onthe active region of semiconductor substrate 100. Then, an insulatinglayer (not shown) is formed over the entire substrate 100. Aplanarization layer 23 is then formed over the entire resultantstructure in order to planarize the uneven surface of substrate 100created by the formation of the transistors and bit line. Then,planarization layer 23 and the insulating layer, are selectively etchedat an area above the source regions 5 to form contact holes forconnecting the source regions to lower electrodes. Then, as a conductivematerial, phosphorous-doped polysilicon is deposited on substrate 100 atleast where the contact hole is formed, and then etched back so that thecontact hole is filled with a conductive plug 25.

FIG. 4 shows the step of forming the lower electrodes of the capacitor.A titanium layer having a thickness of approximately 500 Å and aplatinum layer having a thickness of 1,000 Å are sequentially formed bysputtering these substances over the entire resultant structure,including conductive plug 25. Then, a photoresist pattern (not shown) isformed on the platinum layer (upper layer) by coating, exposing anddeveloping the photoresist so as to define each cell. Then, both layersare simultaneously etched using the photoresist pattern as a mask, tothereby form the capacitor's lower electrode which consists of platinumpattern 35 and titanium pattern 30. Then, the first photoresist patternis removed. Here, tantalum can be used instead of titanium in the lowerelectrode.

FIG. 5 shows the step of forming a first spacer 45'. A material having alow dielectric constant, such as plasma-enhanced SiO₂ (PE-SiO₂), a CVDoxide film, silicon nitride (Si_(x) N_(y)), boro-nitride (BN),boro-phosphorous silicate glass (BPSG), phosphorous silicate glass(PSG), undoped silicate glass (USG) or boro-silicate glass (BSG) isdeposited to a thickness of 1,500 Å to 2,000 Å on the resultantstructure of FIG. 4. Then, the low dielectric material is etchedanisotropically to form first spacer 45' on the side surfaces of thelower electrode.

FIG. 6 shows the step of forming a ferroelectric film 40 and an upperelectrode 50. The ferroelectric material may comprise PZT, PbTiO₃ (PLT),PbLaZrTiO₃ (PLZT), SrTiO₃ (STO), BST or LiNbO₃ (LNO), and is depositedby a CVD method on the resultant structure of FIG. 5. As a result,ferroelectric film 40 is formed. Then, as a conductive material,platinum, TiN or aluminum is deposited on ferroelectric film 40 to formthe capacitor's upper electrode.

FIGS. 7 to 8 are sectional views for illustrating a method formanufacturing a semiconductor device comprising a ferroelectric filmcapacitor according to a second embodiment of the present invention.

FIG. 7 shows the step of forming the lower electrodes of the capacitorand a second spacer 60. After forming the lower electrodes using themethod explained with respect to FIGS. 3 and 4, a low dielectricmaterial consisting of BN, BPSG, BSG or SiO₂ is deposited to a thicknessof approximately 2,000 Å to 10,000 Å over the resultant structure. Then,the low dielectric material is etched anisotropically so that secondspacer 60 is formed on the side surface of the lower electrodes, whichconsist of platinum pattern 35 and titanium pattern 30. Second spacers60 fills the space between the adjacent lower electrodes more than thespacers in the first embodiment.

FIG. 8 shows the step of sequentially forming ferroelectric film 40 andupper electrode 50 on lower electrodes having side surfaces providedwith second spacer 60 using the method explained with respect to FIG. 7.

FIGS. 9 and 10 are sectional views for illustrating a method formanufacturing for a semiconductor device which comprises a ferroelectricfilm capacitor according to a third embodiment of the present invention.

FIG. 9 shows the step of forming the lower electrodes and a third spacer70. After forming the lower electrodes using the method explained withrespect,to FIGS. 3 and 4, a low dielectric material such as BPSG, PSG orBSG is deposited to a thickness of approximately 2,000 to 10,000 Å overthe entire resultant structure. Then, the low dielectric material isplanarized by a high-temperature heat treatment process, and theresultant structure is etched anisotropically so that third spacer 70 isformed on the side surfaces of the lower electrode consists of platinumpattern 35 and titanium pattern 30. Third spacer 70 completely fills upthe space between the adjacent lower electrodes so that the lowerelectrodes of each cell can be separated by a planarized surface. FIG.10 shows the step of then sequentially forming ferroelectric film 40 andupper electrode 50 on the lower electrodes using the method explainedwith respect to FIG. 6.

As described above, and according to embodiments of the presentinvention, a spacer comprising a low dielectric material is formed onthe side surfaces of a capacitor's lower electrode so that errors whichmay be caused between the adjacent lower electrodes are prevented. Inaddition, the sharp edges of the lower electrodes are somewhat morerounded by the spacers, and as a result, the possibility that theferroelectric film may be weakened in this area is reduced.

In addition, in all the above embodiments, since a spacer consisting ofthe low dielectric material is formed by a simple anisotropic etchingprocess without the use of any additional masking, the problemsassociated with the prior art can be easily solved without addedprocessing problems and without increasing production costs.

It is understood by those skilled in the art that the foregoingdescription is a preferred embodiment of the disclosed device and thatvarious changes and modifications may be made in the invention withoutdeparting from the spirit and scope thereof.

What is claimed is:
 1. A method for manufacturing a semiconductor devicehaving a capacitor, said method comprising the steps of:forming aplurality of lower electrodes from a conductive material, said lowerelectrodes each having side surfaces, and said lower electrodes eachhaving a double layer structure comprising a barrier metal and aplatinum group metal; forming a spacer on the side surfaces of each ofsaid lower electrodes, said spacer comprising a low dielectric constantmaterial, such that the spacer is formed at least along a top edge ofthe side surfaces of the lower electrodes; forming a ferroelectric filmdirectly on at least said lower electrodes and each said spacer; andforming an upper electrode on said ferroelectric film.
 2. A method formanufacturing a semiconductor device having a capacitor, said methodcomprising the steps of:forming a plurality of lower electrodes from aconductive material, said lower electrodes being spatially separatedfrom one another; providing a material having a low dielectric constantbetween said lower electrodes, such that the material is provided atleast along a top edge of side surfaces of the lower electrodes; forminga ferroelectric film directly on at least said lower electrodes and saidmaterial between said lower electrodes; and forming an upper electrodeon said ferroelectric film.
 3. A method for manufacturing asemiconductor device according to claim 2, wherein said providing stepcomprises the steps of:depositing said material having a dielectricconstant at least over and between said lower electrodes; planarizingsaid material having a dielectric constant; and etching anisotropicallysaid material having a dielectric constant.
 4. A method formanufacturing a semiconductor device according to claim 1, wherein saidspacer comprises a material selected from the group consisting of PESiO₂, CVD oxide, Si_(x) N_(y), BN, BPSG, PSG, USG, and BSG.
 5. A methodfor manufacturing a semiconductor device according to claim 2, whereinsaid material having a low dielectric constant comprises a materialselected from the group consisting of PE SiO₂, CVD oxide, Si_(x) N_(y),BN, BPSG, PSG, USG, and BSG.